This application relates to a method and apparatus for characterizing multi-terminal linear devices operating in several modes, and, in particular, to a method and apparatus for measuring devices in any of unbalanced, balanced, and multiple modes of operation.
It is to be understood that according to this disclosure an unbalanced device has one signal carrying terminal for each single ended input and output of the device and operates in the single ended mode. It is also to be understood that a balanced device has two signal carrying terminals for each balanced input and output pair of the device and operates in one of two modes, either a common mode (even mode) or a differential mode (odd mode).
Signal integrity and its characterization is an issue of growing importance as digital networks increase in speed and bandwidth. Traditionally, RF devices and digital devices have had little in common. However, as digital signals operate higher and higher in speed and approach a 1 gigabit per second (hereinafter xe2x80x9cGb/sxe2x80x9d) threshold, the digital signal analysis tools and the RF signal analysis tools begin to overlap in function and requirements. In addition, with higher speed digital signals, the harmonic contents of the digital signals are many times higher than a frequency of a fundamental tone, which results in a need for greater precision in connections between, for example, a device under test (hereinafter xe2x80x9cDUTxe2x80x9d) and testing devices that characterize these high speed digital DUTs.
A traditional differential time domain reflectometer (hereinafter xe2x80x9cTDRxe2x80x9d) system, which has been used to test digital DUTs, uses a step function as a driving signal to a DUT. The step function signal is used because there is no commercially available signal source that can generate an impulse function, which is a preferred driving signal for analog circuit characterization.
Due to the harmonic frequencies content in fast-rise-time digital signals, one may think of high-speed digital circuits or interconnections as transmission lines, and consider the effects of, for example, reflected signals on the measurement of these circuits and interconnections. However, frequency domain instruments such as the Vector Network Analyzer (hereinafter xe2x80x9cVNAxe2x80x9d) that typically consider these effects have not historically been used to measure such digital circuits and interconnections. Instead, the differential TDR has been used to characterize high-speed digital circuits and components.
There are several reasons why the differential TDR has traditionally been used. For one, time-domain representations of digital signals, such as state-to-state transitions, need to be preserved and their signal characteristics as a function of time need to be characterized. In addition, most devices and systems transmitting high-speed digital data use differential signals, while most VNAs are designed for single-ended or unbalanced, 2-terminal devices. However, with increasing data rates, the dynamic range of a very high-speed differential TDR system is often inadequate for analyzing low-level signals such as crosstalk signals or the signal components responsible for generating electromagnetic interference (hereinafter xe2x80x9cEMIxe2x80x9d). In addition, the parasitic inductances and capacitances that exist in signal lines and interconnections are generally ignored at lower data rates, where traditional TDR systems have been used, but as the data rates become significantly higher they can no longer be ignored. Further, the traditional differential TDR systems do not correct for the systematic sources of error in the measurement equipment, nor do they support de-embedding fixtures or interconnects used to characterize a DUT.
As is known to those of skill in the art, a complete characterization of a single-ended linear 1-terminal or 2-terminal DUT can be achieved by measuring standard S-parameters with a Vector Network Analyzer (hereinafter xe2x80x9cVNAxe2x80x9d). A standard 2-port S-parameter matrix represents a frequency domain representation of all possible signal paths between any two terminals of a multi-terminal DUT, including forward, reverse, transmission and reflection characteristics of and between the two terminals of the DUT.
One known procedure for measurement of a multi-terminal DUT with a commercially available 2-port VNA, is to connect each port of the VNA to 2-terminals of the multi-terminal DUT, and to terminate the rest of the terminals of the multi-terminal DUT with high quality matching terminations. The 2-port VNA is used to measure or characterize the 2-terminals of the multi-terminal DUT with the remainder of the terminals terminated. This procedure is then repeated wherein two additional terminals of the multi-terminal DUT are measured and the remainder of the terminals are terminated with the high quality matching terminations, until all of the terminals of the multi-terminal DUT have been measured. Once all the terminals of the multi-terminal device have been measured, the plurality of 2-port measurements made by the VNA are then processed to obtain the S-parameters of the multi-terminal DUT. This procedure is described, for example in the related art portion of U.S. Pat. No. 5,578,932 issued to the applicant of this application, which is herein incorporated by reference in its entirety.
As was described in Combined Differential and Common-Mode Scattering Parameters: Theory and Simulation, David G. Bockelman and William R. Eisenstadt, IEEE Transactions on Microwave Theory and Techniques, Vol. 43, No. 7, July 1995 (hereinafter xe2x80x9cthe Bockelman IEEE Articlexe2x80x9d). The standard S-parameters can be extended to mixed-mode S-parameters (hereinafter xe2x80x9cSmmxe2x80x9d) that characterize the linear performance of balanced devices. The mixed-mode S-parameter matrix [Smm] are similar to conventional signal-ended S-parameter matrix [S] in that the [Smm] characterize the stimuli and the response between any two terminals of a DUT. However, the [Smm] also considers the stimulus and response mode of operation, in addition to the stimulus and response port.
Referring to FIG. 1(a), as is known to those of skill in the art, the single-ended 2-port [S] are defined in the format Syz with yz representing the response and stimulus ports, respectively. Referring now to FIG. 1(b), the mixed-mode S-parameter matrix [Smm] for balanced devices are defined as Swxyz, with wx representing the additional response and stimulus modes of the DUT. The [Smm] of FIG. 1(b) can characterize the linear performance of a balanced 2-terminal device. As with single-ended S-parameters [S], each column represents a different stimulus condition and each row represents a different response. In addition, the [Smm] matrix can be divided into four quadrants, and the DUT can be considered a 2-port device operating in pure and conversion modes of operation, as illustrated in FIG. 1(b).
Referring to FIG. 1(b), the upper left-hand quadrant describes the behavior of the DUT when it is stimulated with a differential-mode signal and a differential-mode response is observed. This quadrant consists of four parameters: reflection parameters Sdd11, Sdd22 on both balanced terminals one and two of the 2-terminal DUT and transmission parameters Sdd21, Sdd12 in forward and reversed directions between terminals one and two of the 2-terminal DUT. Thus, this quadrant describes the performance characteristics of a 2-terminal DUT operating in the differential mode.
The lower right quadrant describes the behavior of the DUT when it is stimulated with a common-mode signal and a common-mode response is observed. This quadrant also consists of four parameters: reflection parameters Scc11, Scc22 on both balance terminals one and two of the DUT and transmission parameters Scc21, Scc12 in the forward and reverse directions between terminals one and two. This quadrant describes the fundamental performance characteristics of a 2-terminal DUT operating in the common-mode. It is to be appreciated by one of skill in the art that if one objective is to reduce the level of common-mode signals in a DUT, these parameters can be used to analyze the DUT behavior. In addition, common-mode rejection of the DUT is often of interest, and it can be calculated by taking a ratio of a differential-mode gain, Sdd21, to the common-mode gain, Scc21.
The lower left quadrant of FIG. 1(b) describes the behavior of the DUT when it is stimulated with a differential-mode signal and a common-mode response is observed. The S-parameters of this quadrant show how the DUT converts a differential-mode signal to a common-mode signal. Again, it is possible to examine reflections on each terminal and transmission of a signal in the forward and reverse directions in this mode of operation. It is to be appreciated that in a perfectly symmetrical balanced device, there should be no conversion between the differential mode and the common mode and all of these S-parameters should be zero.
This lower left quadrant is useful for describing the behavior of the DUT, for example, because any asymmetry in a DUT may result in an imbalance in an amplitude of signals on each side of a balanced pair of terminals of the DUT, or in a phase skew. A conversion of a stimulus signal from a differential-mode to a common-mode may, for example, cause signals to appear on ground returns in the DUT and can result in generation of electromagnetic interference (hereinafter xe2x80x9cEMIxe2x80x9d). In high-speed digital signal devices, any imbalance in the DUT can also result in degradation of bit-error rates (hereinafter xe2x80x9cBERsxe2x80x9d).
The upper right quadrant of FIG. 1(b), describes the behavior of the DUT when it is stimulated with a common-mode signal and a differential-mode response is observed. These S-parameters characterize how the DUT converts a common-mode signal to a differential-mode signal. The mixed mode S-parameters in the upper right quadrant also characterize reflections on each terminal and transmission in a forward and reverse directions between terminals one and two of the DUT. Again, it is to be appreciated that if a balanced DUT is perfectly symmetrical, there will be no conversion between these modes, and all of these terms should be zero.
As discussed above, any conversion of a signal from a common-mode to a differential-mode may cause the DUT and any system that the DUT is to be used, to be susceptible to EMI. For example, noise that couples into the DUT and system from power supplies, ground connections, and the like may generally be introduced as a common-mode signal. If this common-mode noise signal is converted to the differential-mode, it may be superimposed on the actual DUT signal and degrade its signal-to-noise ratio. Therefore, the mode-conversion behavior of the DUT from common to differential mode may result in the DUT being susceptible to sources of noise and interference.
Accordingly, mode-conversion is one phenomenon that should be considered when examining the signal integrity of balanced DUTs. However, since these signals are ideally zero, the dynamic range provided by a conventional differential TDR systems is typically not sufficient.
It is to be appreciated that the tremendous growth of, for example, the Internet and the increasingly faster processing speed of computers and other digital devices is moving more products into the domain of high-frequency data transmissions. Uncorrected sources of error in current test instruments may have been acceptable for lower data rate devices, but are no longer acceptable as the data rates of these devices are increasingly pushed higher. In addition, much of the test equipment used to characterize these digital devices provide scalar data. However, scalar data does not include enough information to adequately characterize and remove the sources of error. Further, these traditional test devices have issues of dynamic range and also may often provide an excessive amplitude incident signal to the DUT being tested.
Accordingly to one aspect of some embodiments of an N-port automatic calibration device of the invention, there is provided a simpler device having improved performance.
According to one embodiment of the invention, there is provided a N-port automatic calibration device comprising N-ports, wherein each port is adapted to be coupled to a port of a N-port multiport test set. The N-port automatic calibration device comprises a single-pole, Nxe2x88x921 throw switch having a single-pole coupled to a first port of the automatic calibration device and having each throw of the Nxe2x88x921 throws coupled to a respective port of the automatic calibration device. In addition, the N-port automatic calibration device comprises at least one single-pole, double-throw switch, having a single-pole coupled to a second port of the N-ports of the automatic calibration device, having a first throw coupled to a first load impedance, and having a second throw coupled to a throw of the Nxe2x88x921 throws of the single-pole, Nxe2x88x921 throw switch.